Designing MOSFET Pre-Charge Paths for Large DC-Link Capacitors

Charging a large DC-link capacitor directly from a battery or rectified bus can produce an inrush pulse limited mainly by wiring resistance and capacitor ESR. Besides stressing connectors and fuses, that pulse can weld a contactor. A controlled pre-charge path replaces the uncontrolled surge with a predictable current ramp.

Start with energy, not only current

The capacitor stores E = ½CV². That energy determines the thermal burden on the resistor and switching device during each start. Select a resistor that limits initial current to an acceptable value, then check pulse energy, repetition rate, and cooling. The MOSFET must tolerate the transient while operating in its linear region; a low headline RDS(on) alone does not guarantee adequate safe operating area.

For a solid-state path, review voltage margin, gate control, avalanche behavior, package thermal impedance, and the DC safe-operating-area graph. A broad power MOSFET selection makes it easier to compare these parameters before committing to a footprint.

Control and verify the transition

Measure bus voltage on both sides of the pre-charge path. The main contactor should close only after the capacitor reaches a defined percentage of source voltage. Add a timeout for open resistors, shorted loads, and incorrect polarity. Gate slew control can reduce EMI, but it increases the time spent in the MOSFET’s highest-dissipation region.

Finally, test at minimum and maximum input voltage, hot and cold starts, and the fastest allowed restart interval. Record the peak device temperature and confirm that the control circuit fails safely if its auxiliary supply collapses. Device data and application categories at MOT Semiconductor can support the early comparison stage, but the finished design still needs bench validation under the real load profile.